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september 2013 doc id 15586 rev 3 1/28 28 vnn1nv04p-e, VNS1NV04P-E omnifet ii fully autoprotected power mosfet features ? linear current limitation ? thermal shutdown ? short circuit protection ? integrated clamp ? low current drawn from input pin ? diagnostic feedback through input pin ? esd protection ? direct access to the gate of the power mosfet (analog driving) ? compatible with standard power mosfet description the vnn1nv04p-e, VNS1NV04P-E are monolithic devices designed in stmicroelectronics vipo wer m0-3 technology, intended for replacement of standard power mosfets from dc up to 50 khz applications. built in thermal shutdown, linear current limitation and overvoltage clamp protect the chip in harsh environments. fault feedback can be detected by monitoring the voltage at the input pin. parameter symbol value max on-state resist ance (per ch.) r on 250 m ? current limitation (typ) i limh 1.7 a drain-source clamp voltage v clamp 40 v table 1. device summary package order codes tube tape and reel sot-223 vnn1nv04p-e vnn1nv04ptr-e so-8 VNS1NV04P-E vns1nv04ptr-e sot-223 so-8 1 2 2 3 www.st.com
contents vnn1nv04p-e, VNS1NV04P-E 2/28 doc id 15586 rev 3 contents 1 block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.4 electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3 protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4 package and pcb thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.1 sot-223 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.2 so-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5 package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5.1 sot-223 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5.2 so8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.3 sot-223 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.4 so8 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
vnn1nv04p-e, VNS1NV04P-E list of tables doc id 15586 rev 3 3/28 list of tables table 1. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 3. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 4. electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 5. sot-223 thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 table 6. so-8 thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 table 7. so-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 8. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
list of figures vnn1nv04p-e, VNS1NV04P-E 4/28 doc id 15586 rev 3 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 3. current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 4. switching time test circuit for resistive load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 5. test circuit for diode recovery times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 6. unclamped inductive load test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 7. input charge test circ uit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 8. unclamped inductive waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 9. source-drain diode forward characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 10. static drain-source on resistan ce . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 11. derating curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 12. static drain-source on resistance vs input voltag e (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . 12 figure 13. static drain-source on resistance vs input voltag e (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . 12 figure 14. transconductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 15. static drain-source on resistance vs id . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 16. transfer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 17. turn-on current slope (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 18. turn-on current slope (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 19. input voltage vs input charge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 20. turn-off drain source voltage slope (part 1/2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 21. turn-off drain-source voltage slope (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 22. capacitance variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 23. switching time resistive load (p art 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 24. switching time resistive load (p art 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 25. output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 26. normalized on resistance vs temp erature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 27. normalized input threshold voltage vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 28. normalized current limit vs junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 29. step response curren t limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 30. sot-223 pc board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 31. sot-223 rthj-amb vs pcb copper area in open box free air condition . . . . . . . . . . . . . . 17 figure 32. sot-223 thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . 18 figure 33. sot-223 thermal fitting model of a single channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 34. so-8 pc board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 35. so-8 rthj-amb vs pcb copper area in open box free air condition . . . . . . . . . . . . . . . . . . 19 figure 36. so-8 thermal impedance junction ambient single pu lse . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 37. so-8 thermal fitting model of a single channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 38. sot-223 mechanical data and package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 39. so-8 package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 40. sot-223 tape and reel shipment (suffix ?tr?) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 figure 41. so-8 tube shipment (n o suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 figure 42. so-8 tape and reel shipment (s uffix ?tr?) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6
vnn1nv04p-e, VNS1NV04P-E block diagram and pin description doc id 15586 rev 3 5/28 1 block diagram and pin description figure 1. block diagram figure 2. configurati on diagram (top view) (a) a. for the pins configuration related to sot-223 see outline at page 1. overvoltage gate linear drain source clamp 1 2 3 current limiter control over temperature input drain drain drain drain input source source source 1 4 5 8
electrical specifications vnn1nv04p-e, VNS1NV04P-E 6/28 doc id 15586 rev 3 2 electrical specifications figure 3. current and voltage conventions 2.1 absolute maximum ratings stress values that exceed those listed in th e ?absolute maximum ratings? table can cause permanent damage to the device. these are stress ratings only, and operation of the device at these, or any other conditions greater than those, indicated in the operating sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect de vice reliability. refer also to the stmicroelectronics sure program and other relevant quality documents. drain input source i d i in v in v ds r in table 2. absolute maximum ratings symbol parameter value unit sot-223 so-8 v dsn drain-source voltage (v inn =0 v) internally clamped v v inn input voltage internally clamped v i inn input current +/-20 ma r in minn minimum input series impedance 330 ? i dn drain current internally limited a i rn reverse dc output current -3 a v esd1 electrostatic discharge (r=1.5 k ? , c=100 pf) 4000 v v esd2 electrostatic discharge on output pins only (r=330 ? , c=150 pf) 16500 v p tot total dissipation at t c =25 c 7 8.3 w t j operating junction temperature internally limited c t c case operating temperature internally limited c t stg storage temperature -55 to 150 c
vnn1nv04p-e, VNS1NV04P-E electrical specifications doc id 15586 rev 3 7/28 2.2 thermal data 2.3 electrical characteristics table 3. thermal data symbol parameter max value unit sot-223 so-8 r thj-case thermal resistance junction-case 18 c/w r thj-lead thermal resistance junction-lead 15 c/w r thj-amb thermal resistance junction-ambient 70 (1) 1. when mounted on a standard single-sided fr4 board with 50 mm 2 of cu (at least 35 ? m thick) connected to all drain pins 65 (1) c/w table 4. electrical characteristics symbol parameter test co nditions min typ max unit off (-40 c electrical specifications vnn1nv04p-e, VNS1NV04P-E 8/28 doc id 15586 rev 3 t d(on) turn-on delay time v dd =15 v; i d =0.5 a v gen =5 v; r gen =2.2 k ? (see figure 4 ) 0.25 1.0 s t r rise time 1.3 4.0 s t d(off) turn-off delay time 1.8 5.5 s t f fall time 1.2 4.0 s (di/dt) on turn-on current slope v dd =15 v; i d =1.5 a v gen =5 v; r gen =r in min =330 ? 5a/s q i total input charge v dd =12 v; i d =0.5 a; v in =5 v i gen =2.13 ma (see figure 7 ) 5nc source drain diode (t j =25 c, unless otherwise specified) v sd (1) forward on voltage i sd =0.5 a; v in =0 v 0.8 v t rr reverse recovery time i sd =0.5 a; di/dt=6 a/s v dd =30v; l=200h (see figure 5 ) 205 ns q rr reverse recovery charge 100 nc i rrm reverse recovery current 0.7 a protections (-40 c vnn1nv04p-e, VNS1NV04P-E electrical specifications doc id 15586 rev 3 9/28 figure 4. switching time test circuit for resistive load t i d 90% 10% t v gen t d(on) t d(off) t f t r r gen v gen v d
electrical specifications vnn1nv04p-e, VNS1NV04P-E 10/28 doc id 15586 rev 3 figure 5. test circuit for diode recovery times figure 6. unclamped inductive load test circuits l=100uh a b 8.5 ? v dd r gen fast diode omnifet a d i s 330 ? b omnifet d s i v gen r gen p w v in
vnn1nv04p-e, VNS1NV04P-E electrical specifications doc id 15586 rev 3 11/28 figure 7. input charge test circuit figure 8. unclamped inductive waveforms gen nd8003 v in
electrical specifications vnn1nv04p-e, VNS1NV04P-E 12/28 doc id 15586 rev 3 2.4 electrical char acteristics curves figure 9. source-drain diode forward characteristics figure 10. static drain-source on resistance figure 11. derating curve figure 12. static drain-source on resistance vs input voltage (part 1/2) figure 13. static drain-source on resistance vs input voltage (part 2/2) figure 14. transconductance 0 2 4 6 8 101214 id (a) 700 750 800 850 900 950 1000 vsd (mv) vin=0v 0 0.05 0.1 0.15 0.2 0.25 0.3 id(a) 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 rds(on) (ohms) tj=25oc tj=150oc tj=-40oc vin=2.5v 33.544.555.566.5 7 vin(v) 0 50 100 150 200 250 300 350 400 450 500 rds(on) (mohms) id=0.5a tj=150oc tj=-40oc tj=25oc 3 3.5 4 4.5 5 5.5 6 6.5 vin(v) 0 50 100 150 200 250 300 350 400 450 500 rds(on) (mohms) id=1.5a id=1a id=1.5a id=1a id=1.5a id=1a tj=25oc tj=150oc tj=-40oc 0 0.25 0.5 0.75 1 1.25 1.5 1.75 2 id(a) 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 gfs (s) vds=13v tj=25oc tj=150oc tj=-40oc
vnn1nv04p-e, VNS1NV04P-E electrical specifications doc id 15586 rev 3 13/28 figure 15. static drain-source on resistance vs id figure 16. transfer characteristics figure 17. turn-on current slope (part 1/2) figure 18. turn-on current slope (part 2/2) figure 19. input voltage vs input charge figure 20. turn-off drain source voltage slope (part 1/2) 0 0.25 0.5 0.75 1 1.25 1.5 1.75 2 id(a) 0 50 100 150 200 250 300 350 400 450 500 rds(on) (mohms) tj=25oc tj=150oc tj=-40oc vin=5v vin=3.5v vin=5v vin=5v vin=3.5v vin=3.5v 1.5 1.75 2 2.25 2.5 2.75 3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 vin(v) 0 0.25 0.5 0.75 1 1.25 1.5 1.75 2 2.25 idon(a) vds=13.5v tj=150oc tj=25oc tj=-40oc 0 500 1000 1500 2000 2500 rg(ohm) 0 1 2 3 4 5 6 di/dt(a/us) vin=5v vdd=15v id=1.5a 0 500 1000 1500 2000 2500 rg(ohm) 0.2 0.4 0.6 0.8 1 1.2 1.4 di/dt(a/us) vin=3.5v vdd=15v id=1.5a 0 123456 qg (nc) 0 1 2 3 4 5 6 vin (v) vds=12v id=0.5a 0 500 1000 1500 2000 2500 rg(ohm) 0 50 100 150 200 250 300 350 dv/dt(v/us) vin=5v vdd=15v id=0.5a
electrical specifications vnn1nv04p-e, VNS1NV04P-E 14/28 doc id 15586 rev 3 figure 21. turn-off drain-source voltage slope (part 2/2) figure 22. capacitance variations figure 23. switching time resistive load (part 1/2) figure 24. switching time resistive load (part 2/2) figure 25. output characteristics figure 26. normalized on resistance vs temperature 0 500 1000 1500 2000 2500 rg(ohm) 0 50 100 150 200 250 300 350 dv/dt(v/us) vin=3.5v vdd=15v id=0.5a 0 5 10 15 20 25 30 35 vds(v) 50 75 100 125 150 175 200 225 c(pf) f=1mhz vin=0v 0 250 500 750 1000 1250 1500 1750 2000 2250 2500 rg(ohm) 0 0.25 0.5 0.75 1 1.25 1.5 1.75 2 t(us) vdd=15v id=0.5a vin=5v td(off) td(on) tf tr 3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25 vin(v) 0 50 100 150 200 250 300 350 400 450 500 550 t(ns) vdd=15v id=0.5a rg=330ohm tr td(off) tf td(on) 0123456789101112 vds(v) 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4 id(a) vin=3v vin=5.5v vin=3.5v vin=4.5v -50 -25 0 25 50 75 100 125 150 175 tc (oc) 0.5 0.75 1 1.25 1.5 1.75 2 2.25 rds(on) (mohm) vin=5v id=0.5a
vnn1nv04p-e, VNS1NV04P-E electrical specifications doc id 15586 rev 3 15/28 figure 27. normalized input threshold voltage vs temperature figure 28. normalized current limit vs junction temperature figure 29. step response current limit -50 -25 0 25 50 75 100 125 150 175 tc (oc) 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 vinth (v) vds=vin id=1ma -50 -25 0 25 50 75 100 125 150 175 tc ( o c ) 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 ilim (a) vin=5v vds=13v 5 101520253035 vdd(v) 1.9 2 2.1 2.2 2.3 2.4 tdlim(us) vin=5v rg=330ohm
protection features vnn1nv04p-e, VNS1NV04P-E 16/28 doc id 15586 rev 3 3 protection features during normal operation, the input pin is elec trically connected to the gate of the internal power mosfet through a low impedance path. the device then behaves like a standard power mosfet and can be used as a switch from dc up to 50 khz. the only difference from the user?s standpoint is that a small dc current i iss (typ. 100 a) flows into the input pin in order to supply the internal circuitry. the device integrates: ? overvoltage clamp protection: internally set at 45 v, along with the rugged avalanche characteristics of the power mosfet stage gi ve this device unrivalled ruggedness and energy handling capability. this feature is mainly important when driving inductive loads. ? linear current limiter circuit: limits the drain current i d to i lim whatever the input pin voltages. when the curr ent limiter is active, the device op erates in the linear region, so power dissipation may exceed the capability of the heatsink. both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the over temperature threshold t jsh. ? over temperature and short circuit protection: these are based on sensing the chip temperature and are not dependent on the input voltage. the location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. over temperature cutout occurs in the range 150 to 190 c, a typical value being 170 c. the device is automatically restarted when the chip temperature falls of about 15 c below shutdown temperature. ? status feedback: in the case of an over temperature fault condition (t j > t jsh ), the device tries to sink a diagnostic current i gf through the input pin in order to indicate fault condition. if driven from a low impedance source, this current may be used in order to warn the control circuit of a device shutdown. if the drive impedance is high enough so that the input pin driver is not able to supply the current i gf , the input pin will fall to 0 v. this will not however affect the device operation: no require ment is put on the current capability of the input pin driver except to be able to supply the normal operation drive current i iss . additional features of this device are esd pr otection according to the human body model and the ability to be driven from a ttl logic circuit.
vnn1nv04p-e, VNS1NV04P-E package and pcb thermal data doc id 15586 rev 3 17/28 4 package and pcb thermal data 4.1 sot-223 thermal data figure 30. sot-223 pc board note: layout condition of r th and z th measurements (pcb fr4 area = 58 mm x 58 mm,pcb thickness = 2 mm, cu thickn ess=35 m, copper areas: from minimum pad layout to 0.8 cm 2 ). figure 31. sot-223 r thj-amb vs pcb copper area in open box free air condition . 60 70 80 90 100 110 120 130 140 0 0,5 1 1,5 2 2,5 pcb cu heatsink area (cm^ 2) - (refer to pcb layout) footprint
package and pcb thermal da ta vnn1nv04p-e, VNS1NV04P-E 18/28 doc id 15586 rev 3 figure 32. sot-223 thermal impeda nce junction ambi ent single pulse equation 1: pulse calculation formula where ? = t p /t figure 33. sot-223 thermal fitting model of a single channel table 5. sot-223 thermal parameter area/island (cm 2 )fp2 r1 (c/w) 0.8 r2 (c/w) 1.6 r3 (c/w) 4.5 r4 (c/w) 24 r5 (c/w) 0.1 r6 (c/w) 100 45 0,1 1 10 100 1000 0,0001 0,001 0,01 0,1 1 10 100 1000 time ( s) zth (c/ w) footprint 2 cm 2 z th ? r th ? z thtp 1 ? ? ?? + ? =
vnn1nv04p-e, VNS1NV04P-E package and pcb thermal data doc id 15586 rev 3 19/28 4.2 so-8 thermal data figure 34. so-8 pc board note: layout condition of r th and z th measurements (pcb fr4 area = 58 mm x 58 mm,pcb thickness = 2 mm, cu thickness=35 m, copper areas: from minimum pad layout to 2 cm 2 ). figure 35. so-8 r thj-amb vs pcb copper area in open box free air condition c1 (ws/c) 0.00006 c2 (ws/c) 0.0005 c3 (ws/c) 0.03 c4 (ws/c) 0.16 c5 (ws/c) 1000 c6 (ws/c) 0.5 2 table 5. sot-223 thermal parameter (continued) area/island (cm 2 )fp2 65 75 85 95 105 00,511,522,5 pcb cu heatsink area (cm^ 2) - (refer to pcb layout) footprint
package and pcb thermal da ta vnn1nv04p-e, VNS1NV04P-E 20/28 doc id 15586 rev 3 figure 36. so-8 thermal impedanc e junction ambient single pulse equation 2: pulse calculation formula where ? = t p /t figure 37. so-8 thermal fitting model of a single channel table 6. so-8 thermal parameter area/island (cm 2 )fp2 r1 (c/w) 0.8 r2 (c/w) 2.6 r3 (c/w) 3.5 r4 (c/w) 21 zth (c/ w) 0,1 1 10 100 1000 0,0001 0,001 0,01 0,1 1 10 100 1000 time (s) footprint 2 cm 2 z th ? r th ? z thtp 1 ? ? ?? + ? =
vnn1nv04p-e, VNS1NV04P-E package and pcb thermal data doc id 15586 rev 3 21/28 r5 (c/w) 16 r6 (c/w) 58 28 c1 (ws/c) 0.00006 c2 (ws/c) 0.0005 c3 (ws/c) 0.0075 c4 (ws/c) 0.045 c5 (ws/c) 0.35 c6 (ws/c) 1.05 2 table 6. so-8 thermal parameter (continued) area/island (cm 2 )fp2
package and packing information vnn1nv04p-e, VNS1NV04P-E 22/28 doc id 15586 rev 3 5 package and packing information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions a nd product status are available at: www.st.com . ecopack ? is an st trademark. 5.1 sot-223 mechanical data figure 38. sot-223 mechanical data and package outline
vnn1nv04p-e, VNS1NV04P-E package and packing information doc id 15586 rev 3 23/28 5.2 so8 mechanical data table 7. so-8 mechanical data dim. mm min. typ. max. a 1.75 a1 0.10 0.25 a2 1.25 b 0.28 0.48 c 0.17 0.23 d (1) 1. dimension ?d? does not include mold fl ash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.15 mm in total (both side). 4.80 4.90 5.00 e 5.80 6.00 6.20 e1 (2) 2. dimension ?e1? does not include interlead flash or pr otrusions. interlead flash or protrusions shall not exceed 0.25 mm per side. 3.80 3.90 4.00 e 1.27 h 0.25 0.50 l 0.40 1.27 l1 1.04 k 0 8 ccc 0.10
package and packing information vnn1nv04p-e, VNS1NV04P-E 24/28 doc id 15586 rev 3 figure 39. so-8 package dimension 0016023 d
vnn1nv04p-e, VNS1NV04P-E package and packing information doc id 15586 rev 3 25/28 5.3 sot-223 packing information figure 40. sot-223 tape and reel shipment (suffix ?tr?) reel dimensions base q.ty 1000 bulk q.ty 1000 a (max) 330 b (min) 1.5 c ( 0.2) 13 f 20.2 g (+ 2 / -0) 12.4 n (min) 60 t (max) 18.4 tape dimensions according to electronic industries association (eia) standard 481 rev. a, feb. 1986 all dimensions are in mm. tape width w 12 tape hole spacing p0 ( 0.1) 4 component spacing p 8 hole diameter d (+ 0.1/-0) 1.5 hole diameter d1 (min) 1.5 hole position f ( 0.05) 5.5 compartment depth k (max) 4.5 hole spacing p1 ( 0.1) 2 top cover tape end start no components no components components 500mm min 500mm min empty components pockets saled with cover tape. user direction of feed
package and packing information vnn1nv04p-e, VNS1NV04P-E 26/28 doc id 15586 rev 3 5.4 so8 packing information figure 41. so-8 tube shipment (no suffix) figure 42. so-8 tape and reel shipment (suffix ?tr?) all dimensions are in mm. base q.ty 100 bulk q.ty 2000 tube length ( 0.5) 532 a 3.2 b 6 c ( 0.1) 0.6 c b a tape dimensions according to electronic industries association (eia) standard 481 rev. a, feb. 1986 all dimensions are in mm. tape width w 12 tape hole spacing p0 ( 0.1) 4 component spacing p 8 hole diameter d (+ 0.1/-0) 1.5 hole diameter d1 (min) 1.5 hole position f ( 0.05) 5.5 compartment depth k (max) 4.5 hole spacing p1 ( 0.1) 2 top cover tape end start no components no components components 500mm min 500mm min empty components pockets saled with cover tape. user direction of feed reel dimensions all dimensions are in mm. base q.ty 2500 bulk q.ty 2500 a (max) 330 b (min) 1.5 c ( 0.2) 13 f 20.2 g (+ 2 / -0) 12.4 n (min) 60 t (max) 18.4
vnn1nv04p-e, VNS1NV04P-E revision history doc id 15586 rev 3 27/28 6 revision history table 8. document revision history date revision changes 16-may-2009 1 initial release. 29-sep-2009 2 removed target specification on cover page. 20-sep-2013 3 updated disclaimer.
vnn1nv04p-e, VNS1NV04P-E 28/28 doc id 15586 rev 3 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. st products are not designed or authorized for use in: (a) safety critical applications such as life supporting, active implanted devices or systems wi th product functional safety requirements; (b) aeronautic applications; (c) automotive applications or environments, and/or (d) aerospace applications or environments. where st products are not designed for such use, the purchaser shall use products at purchaser?s sole risk, even if st has been informed in writing of such usage, unless a product is expressly designated by st as being intended for ?automotive, automotive safety or medical? industry domains according to st product design specifications. products formally escc, qml or jan qualified are deemed suitable for use in aerospace by the corresponding governmental agency. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2013 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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